A leading technology company in the United States is seeking a Senior Design Verification Engineer specializing in mixed signal IP. This role involves performing functional verification, developing verification plans, and collaborating with cross-functional teams to improve complex architectural features. Candidates should have a BS degree and at least 8 years of relevant industry experience, including expertise in System Verilog, OVM/UVM, and verification methodologies. A competitive compensation package including stock bonuses and benefits is offered.
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